I. Field
The present invention relates generally to circuits, and more specifically to techniques for conserving power for a wireless terminal.
II. Background
A wireless terminal (e.g., a cellular phone) in a cellular communication system is only sporadically active and remains in an “idle” mode for significant periods of time when no call is in progress. To ensure that the terminal can still receive messages sent to it by the system, the terminal periodically monitors a paging channel even while it is in the idle mode. These messages may alert the terminal to the presence of an incoming call, carry updated system parameters for the terminal, and so on.
The wireless terminal is typically portable and powered by an internal battery. To conserve power and extend standby time between battery recharges, the system typically sends messages on the paging channel to the terminal at designated times. The paging channel may be divided into “slots”, and the terminal may be assigned to specific slots by the system. Thereafter, the terminal enters an “active” state prior to its assigned slot, monitors the paging channel for messages, and transitions to an “inactive” state if additional communication is not required. In the time period between successive active states, the terminal is asleep in the inactive state and deactivates as much circuitry as possible to conserve power. “Sleep” refers to the time during which the terminal is in the inactive state.
Conventionally, the terminal powers down analog circuit blocks (e.g., power amplifiers, oscillators, and so on) and disables clocks to digital circuit blocks while in the inactive state. A digital circuit that is fabricated in complementary metal oxide semiconductor (CMOS) consumes power via two mechanisms: (1) by dissipating dynamic current when the circuit is active and switching and (2) by drawing leakage current when the circuit is inactive and not switching. In contemporary CMOS fabrication technology, the dynamic current is many times greater than the leakage current. In this case, significant power saving may be achieved for CMOS digital circuits by simply disabling the clocks to these circuits to shut off the dynamic current.
However, leakage current is not negligible and will become a significant portion of the total power consumption as CMOS technology scales to smaller geometry. This is because leakage current increases at a very high rate with respect to the decrease in transistor size. The higher leakage current, coupled with long periods of inactivity, consumes power and reduces standby time for portable devices that use battery power, which is highly undesirable.
There is therefore a need in the art for techniques to conserve power for a wireless terminal.